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Ron Fredericks writes: In today’s post, I will demonstrate the value in using LTspice to simulate a complete circuit.

In several previous LTspice posts I described how to use the simulator as a test jig for single IC’s and gates. Each block in a circuit should be tested within LTspice before creating a multi-circuit simulation to verify performance against expected results. The test jig process included downloading a custom gate, IC, and spice code for the cd4066 bi-polar analogue switch from the yahoo LTspice user group, and the creation of my own 74LS193 pre-setable up/down counter from primitive logic gates. Ltspice is very flexible. Most discrete components are readily available in the library, with a great support group from on yahoo. There are a wide variety of spice and pspice models to important from many Internet sources as well..

The Circuit to Simulate

I came across this digital volume control circuit during a web search. The circuit seems to be fairly popular as it shows up in thousands of places on the web. I thought it would be a good place to start my investigation of digital volume control even though there are many industry specific chips out there to manage some of these functions as well as chips that offer much larger feature sets. With this circuit I hope to expand on the features to create new volume control and measurement circuits – perhaps while investigating the value in using an more advanced volume control chip.

This circuit could be used for replacing your manual volume control in a stereo amplifier. In this circuit, push-to-on switch S1 controls the forward (volume increase) operation of both channels while a similar switch S2 controls reverse (volume decrease) operation of both channels.
Here IC1 timer 555 is configured as an astable flip-flop to provide low-frequency pulses to up/down clock input pins of pre-setable up/down counter 74LS193 (IC2) via push-to-on switches S1 and S2. To vary the pulse width of pulses from IC1, one may replace timing resistor R1 with a variable resistor.

Operation of switch S1 (up) causes the binary output to increment while operation of S2 (down) causes the binary output to decrement. The maximum count being 15 (all outputs logic 1) and minimum count being 0 (all outputs logic 0), it results in maximum and minimum volume respectively.

The active high outputs A, B, C and D of the counter are used for controlling two quad bi-polar analogue switches in each of the two CD4066 ICs (IC3 and IC4). Each of the output bits, when high, short a part of the resistor network comprising series resistors R6 through R9 for one channel and R10 through R13 for the other channel, and thereby control the output of the audio signals being fed to the inputs of stereo amplifier. Push-to-on switch S3 is used for resetting the output of counter to 0000, and thereby turning the volume of both channels to the minimum level. — Sheena K. for electronicsforu magazine

Dual-Channel Digital Volume Control Circuit (click to enlarge)

The LTspice Simulation

The Circuit

Volume Controller Schematic in LTspice (click to enlarge)

The Simulation Results

LTspice Simulation Results (click to enlarge)

Ron Fredericks writes: Today is Robert Norton Noyce’s birthday (born 12/12/1927) – co-inventor of the integrated circuit (IC). So I thought I would take a few minutes and document my work modeling the CD4066 quad bilateral switch with the LTspice simulator.

In this post I describe how flexible LTspice can be as a general SPICE circuit simulator, and how accurate its behavior can be in comparing LTspice test results with the physical IC’s datasheet. In this example I use the CD4066B as the IC to model. I test the model using its characteristic “on” resistance curves under various voltage and current operating conditions. I conclude by using a standard CD4066 datasheet to verify the accuracy of the model.

Meanwhile this is the last IC I need to simulate the analog section of the digital volume control circuit using LTspice I mentioned in two of my previous blog entries:

• Digital volume control’s heart beat: Simulating the 555 IC with LTspice and
• Digital volume control’s logic: Introducing 74HC193 Simulation to LTspice.

Define one of four bilateral switches on CD4066 for LTspice

To get the CD4066 IC into my circuit simulation, I first created a symbol for one of the four bilateral switches in this package, and defined a SPICE subcircuit definition for the switch using existing SPICE CD4007 gate models as the starting point.

Symbol for one of four bilateral switches on the CD4066 IC

LTspice symbol for one of four bilateral switches on cd4066 (click to enlarge)

LTspice Subcircuit Definition for CD4066
Note the LTspice implementation of the SPICE language is highlighted (below) using my own GeSHi language highlighter library with key sections of the language (.model and .subcircuit) hyper-linked into SPICE language definitions that I have created on the contributor pages of this website. SPICE is a difficult language to highlight using GeSHi because many of the SPICE language constructs are so short that they overlap with longer language constructs. I plan to add more language definitions in the future as my circuit models need them, and I continue to find unique look-up algorithms to match GeSHi language highlighter categories.

Testing the CD4066 Circuit in LTspice

Finally, I dragged the symbol with subcircuit models into my LTspice program and ran a series of tests to demonstrate the “on” resistance characteristics associated with the switch at various voltage and current values. Note the multicolored graph showing the resistance curves at various VI levels.

VI curves and circuit schematic for cd4066 bilateral switch under test (click to enlarge)

Get these files from LTspice Yahoo Group

The 4 main files used to create this demo circuit can be obtained from LTspice Yahoo Group. Special thanks to Helmut Sennewald

See the figure below…

LTspice Yahoo Group File List (click to enlarge)

Comparison of LTspice circuit simulation with datasheet

The TI datasheet compares favorably with my simulations. The LTspice “on” resistance curves and values are nearly exactly the same as those shown in figures 2,3, and 4 of TI’s datasheet (page 6) for the range I tested.

At this stage of development in simulating the analog path for my automatic volume control circuit, I see that the “on” resistance curve may create an unstable signal path under normal audio conditions unless the operating voltage (Vcc ) is much higher than the original circuit’s proposed 5 VDC power supply.

References

Linear Technologies LTspice Landing Page

Texas Instruments datasheet for the CD4066B

What’s All This CD4007 Stuff, Anyhow?
Bob Pease | ED Online ID #6073 | April 5, 1999
http://electronicdesign.com/Articles/ArticleID/6073/6073.html

Fault in CD4066 Model
kcin_melnick | LTspice Yahoo Tech Group Message #16897 | June 24, 2007
http://tech.groups.yahoo.com/group/LTspice/message/16897

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Technorati Tags: bilateral switch, cd4007, CD4066, Helmut Sennewald, ltspice, simulation

Embedded Components and Tools forum: December 2011

The forum introduces real-time embedded systems technology designed, reviewed, or filmed by Ron Fredericks. Ron focuses on hardware, software, and cloud services for the embedded systems industry through the EmbeddedComponents.com platform and his Bay Area media lab located in Sunnyvale California called LectureMaker LLC.

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Technorati Tags: Embedded Software, Inflexion UI, Integra, L-138, Mentor Graphics, Newsletter, Nucleus, OMAP, Power Management, ReadyStart, Robot, RTOS, Sourcery CodeBench, Sourcery Tools, Stellaris, ZigBee

Ron Fredericks writes: Have you tried to post software demo’s on youtube? If so, then this online video produced from LectureMaker‘s high-tech video studio can help you get up to speed very quickly on how to solve the video publishing problems associated with software screencasting. The video demonstrates how to build a simple external hard disk starting from an enclosure for USB and eSTATA connectivity with a PC, MAC, or Linux box. The video concludes with a walk-through on how to format the disk into two partitions.

Enjoy…

Technorati Tags: Ron Fredericks, youtube, LectureMaker, screencasting, USB, eSTATA, partition

Ron Fredericks writes: I just read the press release on Wind River‘s Hypervisor and Mark Hermeling‘s blog on the subject of multi-core virtualization.

Wind River gets a second chance on connecting smart devices into the enterprise world.

One of their previous attempts was Wind’s office political initiative into Embedded BSD/OS. I thought the BSD OS play was great for Wind River if only they connected their robust multi-core OS from the smart device into the enterpise. Now I see and hope that Wind River has learned from this prior effort and is off to a second chance.

The Wind River Hypervisor

So there are a few different kinds of hypervisor: here is a link to a short discription of the server OS, versus their type 1 and 2 hypervisors. Follow Wind River to learn more about their vision for an embedded system hypervisor.

Now of course the cloud is more tied to the embedded system world than ever. Just look at UC Berkeley‘s upcoming annual technology day called BEARS, where CAL’s EE and CS researchers share with the technology industry.

I sure hope Wind River will be attending!

This year’s 2010 Berkeley EECS Annual Research Symposium event is called: From Clouds to Sensors – A Berkeley View

The CAL BEARS 2010 Symposium view from the clouds

Ron has been in the enterprise, embedded systems, and smartphone technical marketing and partner development for the past 15+ years. Contact him to learn more about how relationship marketing can be used to connect the embedded systems hypervisor to the enterprise clouds with effecient use of industry and university partnerships.

Technorati Tags: Ron Fredericks, Wind River, Hypervisor, Mark Hermeling, multi-core, virtualization, Embedded BSD/OS, UC Berkeley, From Clouds to Sensors

Ron Fredericks writes: Are you new to the google android smartphone platform and developer ecosystem? If so, then this online video produced from LectureMaker‘s high-tech video studio can help you get up to speed very quickly. The video includes several navigation dots along the time line so you can jump to the content you want to watch (once it has downloaded). Expect to get an overview, some sample code demos, and an understanding of the business case behind developing apps for Android from watching this great video presented by Marko Gargenta of Marakana.

Enjoy…

Technorati Tags: Ron Fredericks, google android, developer ecosystem, LectureMaker, Marko Gargenta, marakana, Software Developer Forum

Ron Fredericks writes: In February I attended the Bay Area R User Group meeting held at Predictive Analytics World 2009. Michael E. Driscoll, one of the meeting co-chairs, was gracious enough to let me capture the video as a “light house” project for LectureMaker.com.

Panel:

• Bo Cowgill, Google
• Itamar Rosenn, Facebook
• David Smith, REvolution Computing
• Jim Porzak, The Generations Network

Moderator:

• Michael E. Driscoll, Dataspora LLC

The R and Science of Predictive Analytics: Four Case Studies in R

Learn more and watch lecture

Watch this video to learn about:

1. The open-source analytics programming language called R
2. How Google and Facebook approach analytics to predict their web user community’s behavior
3. Where to download R and get enterprise level support
4. How the meeting co-chairs use R

Technorati Tags: Ron Fredericks, Predictive Analytics World, LectureMaker, Bo Cowgill, Google, Itamar Rosenn, Facebook, David Smith, REvolution Computing, Jim Porzak, The Generations Network, Michael E. Driscoll, Dataspora LLC, R, Predictive Analytics, behavior

The marketing bubble‘s effect on embedded device software developers

Introduction

Ron Fredericks writes: In yesterday’s marketing webinar: Beyond Monitoring: Managing Social Media Engagement by SocialRep‘s CEO, Chris Kenton, viewers were riveted by his inside knowledge on social media’s word-of-mouth marketing. Chris is well known for his combination of social media marketing knowledge as well as his ability to strip away the facts from the hype.

To set the stage, my own readers have found my marketing FAQ to be a very popular read for the embedded device software industry: Assessing marketing’s critical role in organizational performance. Read on to see if it will blend!

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Technorati Tags: marketing bubble, software developer, Ron Fredericks, SocialRep, Chris Kenton, social media, marketing, embedded device, software

Technorati Tags: Marketing, Marketing Bubble, Social Media, Word-of-Mouth

Ron Fredericks writes: I finally got around to cleaning up my old Drupal 5 site. The solution was to simply start over with Drupal 6.4 – the current stable release. The clean-up was necessary because too many spammers had flooded my old Drupal 5 site. Although there are many core modules bundled with a new Drupal installation, I discovered the hard way that some very important extra modules must be added from the excellent community of Drupal contributors. A good anti-spam module is a case in point.

My WordPress blog on this site is well protected thanks to Akismet. They also have a Drupal project too: drupal.org/project/akismet

You can follow my Drupal site blog – as a work in progress – from here:
www.ronfredericks.net/drupal-6.4

Technorati Tags: Ron Fredericks, Drupal, Akismet

Technorati Tags: Akismet, Blog, Drupal

Ron Fredericks writes: I have completed the design and test of a new component for LTspice/SwitcherCAD III circuit simulation and schematic capture. In a previous post I discussed my interest in the 74193 presettable synchronous 4-bit binary up/down counter IC for a digital volume control circuit I am building. The circuit simulation described below focuses on how to simulate the 74HC193 IC, but timing and voltage parameters built into this design allow a designer to easily simulate other variants of this IC from high speed Si-gate CMOS HC and HCT devices to low power Schottky TTL devices.

All circuits related to this 74HC193 simulation are available here>

The 74HC193 Component

See figure 1 below for a screen shot of the completed design. The circuit was built from the digital gates in the component library supplied with the original Linear Technology‘s free LTspice tool.

Figure 1 – 74HC193 Circuit and Related Components

View larger image>

To keep the design looking like the original data sheet logic diagram, as published by companies that include NXP Semiconductors and Texas Instruments, a custom “T notS-R FlipFlop” subcomponent and corresponding assembly file was first created. This subcomponent was reused 4 times in the main IC logic diagram. An assembly file called 74hc193.asy was also created. It includes all pins used on the commercial IC except ground and Vcc. The IC’s internal power supply is not simulated by the Linear Technologies’ gates, and so they are not used or required in this design either.

Each gate within the design has a few variables assigned to them so that the IC remains flexible and easy to reuse in new projects:

• tdgate td (propagation time delay assigned to each gate)
• tdgate2 td (propagation time delay assigned to the D FlipFlop)
• tripdtgate tripdt (td’s accuracy band assigned to each gate including the D FlipFlop)
• vhighgate logical high value for each gate and D FlipFlop
• vlowgate logical low value for each gate and D FlipFlop

These variables can be assigned their corresponding time and voltage values using a .param statement placed in the main circuit. These values are then within scope for automatic reuse by the 74HC193 component and flipflop subcomponent simulations. Below is an example of how parameter assignment can be made (as used in the test circuit described next):

.param tdgate=10n tdgate2=3*tdgate tripdtgate=1n vhighgate=5v vlowgate=0v

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Technorati Tags: Ron Fredericks, component, LTspice, SwitcherCAD III, circuit simulation, schematic capture, 74193, IC, circuit, simulation, timing, voltage, CMOS, Schottky, TTL, Linear Technology

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